A programmable logic device (PLD) is a standard product which can be purchased by systems manufacturers in a "blank" state and, thereafter, custom-configured into a virtually unlimited number of specific logic functions by programming the device. A programmable logic device typically comprises a numbers of pads or cells which can be bonded out to the pins of a package, thereby providing connections between logic circuitry within the device and external elements. Different cells support different connections. That is, some cells are required for the input or output of information, other cells are required for power, and yet other cells are required for grounding.
Programmable logic devices are often developed as "families" of related devices. The different devices in a family provide the same kind of logical functionality, but in varying amounts. For example, all devices in a given family may be operable to compute complex equations; one device, however, may be capable of only computing X number of equations in a given time, whereas another device may be capable of computing 2X number of equations in the same time. Generally, the physical size of a particular device within a given family is directly related to the amount of logical functionality provided by that device. In other words, a larger semiconducting die is required to implement a device which provides more functionality (e.g., one which can solve more equations in a given amount of time).
Because of their programmable nature, programmable logic devices offer great flexibility. Accordingly, a circuit board incorporating such a logic device can be designed independently from the device, thereby allowing development of the board to proceed simultaneously with the development of the programmable logic device. Furthermore, different devices of a programmable logic device family can be "migrated" into packages of the same size so that a system builder can design a circuit board for a particular pin assignment or "footprint," and then choose from any device of such family according to the amount of logical functionality required.
According to previous techniques, the migration of related devices into packages of the same size with identical pin assignments is accomplished as follows. A pattern is created for the different cells used to provide input/output, power, and grounding. For example, a pattern may consist of eight cells for input/output (I/O), one cell for power, and one cell for grounding. This pattern can be repeated multiple times across each edge of a programmable logic device. In a family of related devices, to ensure an even distribution of power, each device has twice the number of repetitions of a cell pattern as the next smaller device. That is, if the smallest device in the family has n repetitions of a pattern, larger devices in the family will have 2n, 4n, 8n, 16n, etc., repetitions of the same pattern. Larger devices in a family are migrated to the same size package as a smaller device of the family by bonding out only a portion of the repeated patterns. For example, if one device in a family has n repetitions of a pattern, and the next larger device has 2n repetitions of the same pattern, the larger device can be migrated into a package for the smaller device by bonding out only every other cell pattern. This technique is commonly referred to as "interleaving." Interleaving is required under previous techniques to provide a uniform power distribution throughout larger devices in the family. If the cell patterns are not interleaved, then a particular portion of the logic circuitry will be denied power such that the section is rendered inoperative. In such case, that section of logic circuitry cannot be used, and the logical functionality of the device is reduced by a proportionate amount.
In light of the above, previous techniques are problematic for numerous reasons. For example, related devices in a family are not scalable in small increments, but rather scalable only in powers of "2." Consequently, a system builder may not be given a sufficient choice of devices from which to select a device that is most suitable for the builder's needs. Furthermore, interleaving of cells is almost impossible when the number of cells on a larger device is not an integer multiple of a smaller device in the same family. Accordingly, not every device in a family can be migrated into a package of a particular size having a particular pin assignment. In addition, due to constraints imposed by power distribution, all devices in a family must be designed at one time.